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SiS - 2024 Issue 7 - Part 2
 


CEA-Leti announces launch of FAMES pilot line as part of EU Chips Act initiative
Jean-René Lèquepeys, CTO of CEA-Leti, explains how the pilot line ecosystem of research and commercial partners will develop five new sets of technologies: FD-SOI (with two new generation nodes at 10nm and 7nm), several types of embedded non-volatile memories, radio-frequency components, two 3D integration options (heterogeneous integration and sequential integration), and small inductors to develop DC-DC converters for Power Management Integrated Circuits (PMIC).

Imec demonstrates logic and DRAM structures using High NA EUV Lithography
Kurt Ronse, Advanced Patterning Program Director at imec, discusses the background to this exciting technical breakthrough, the results of which confirm the readiness of the High NA EUV patterning ecosystem for future logic and memory use cases. Kurt talks through the details of the successful demonstrations, explaining the significance of this work, as well as looking ahead to the future of both High NA and the possibilities for Hyper-NA EUV lithography over time.

NPUs emerging as GPU alternative in AI applications
Dorian Maillard, Principal at DAI Magister, explains how environmental concerns are driving the development of more energy-efficient algorithms and hardware, which could lay the foundations for the mass adoption of domain-specific processors optimised for executing AI tasks efficiently, known as neural processing units (NPUs).

Redefining energy-efficient processing
Brandon Lucia, a Carnegie Mellon professor who recently founded Efficient Computer, a company that is producing a general purpose chip said to be up to 100 times more energy-efficient than leading general-purpose CPUs, talks through the company’s reconfigurable dataflow processor architecture, explaining just how much of an impact he believes this innovation will have where AI and ML are used in IoT devices at the edge and, maybe overtime, in the data centre itself.

Optimising wafer manufacturing yield with proper thermal control
Margaret Brennan, Principal Engineering Lead, Application Solutions, and Doug Nordstrom, Product Manager, both at Swagelok, discuss the importance of the thermal loop when it comes to improving wafer manufacturing yield. Advanced thermal control techniques are an often overlooked subject, where the specification, installation and ongoing monitoring and maintenance of hoses with proper insulation, for example, can mean the difference between success and failure.

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